1. Field of the Invention
The present invention relates to frequency filtering and frequency discrimination to detect high speed and low speed modes.
2. Background Information
In communications applications wire conductors are often at a premium. In some systems high frequency clocks are may be found time sharing the same wire connection with lower speed clocks. Such systems typically use a reference oscillator set between incoming frequencies. The incoming frequency is compared to the reference oscillator to detect and indicate high or low frequency mode operation. In systems that operate with a high and a low speed clock, RC (resistor/capacitor) filters are often employed.
Limitations of known systems include: high speed clock signals leaking through (due to latency and/or lag associated the frequency changes) during a transition from a lower to a higher clock frequency; distorting clock duty cycles due to RC filtering and circuit component mismatches; and excessive power dissipation.
The present invention addresses these limitations above while providing an advantage of a smaller circuitry footprint and reduced power dissipation due to elimination of the free running oscillator.